360 Systems

360-2020/2022
360-2025
360-2030
360-2040
360-2044
360-2050
360-2065
360-2067
360-2075
360-2085
360-3195

The IBM 360 range of computers were first introduced in 1964. The range was designed to be "General Purpose" and used for both Data Processing and Scientific use. All machines shared the standard 360 Instruction Set. Upward compatibility was designed to give the users a growth path that enabled them to keep their investment in both data and programs. This compatibility extends to some extent right up to today's new IBM CMOS processors. Another major part of the design was that the systems could emulate the earlier 1401 range of computers, again this offered the users the opportunity to continue to use their older programs.

This compatibility was achieved by programmable micro code being embedded into the CPU. The first system to be delivered to a customer was the 2040 CPU which was designed at Hursley Laboratory in Southern England. Hursley had been working on Read Only Storage (ROS) for a number of years and had a working Transformer Read Only Storage (TROS). The development of the various types of ROS created great competition between the IBM laboratories, as you will see different types of ROS were used across the complete range of 360 systems.

The systems were built using IBM's latest Solid Logic Technology (SLT). SLT used micro-miniaturisation of transistors and diodes, these circuits were then packaged in half inch square modules. Within the tools and test section of the Museum you will find descriptions of both SLT circuits and their power supplies.

A number of other issues were raised with the development of this new series of computers. Upward compatibility was an essential part of the design as well as a desired power range of 50:1 across the series. This power range was achieved in a number of different ways, but you will see that the idea of making the storage buss wider makes the computer faster is a very old practice. Also the use of micro-code had a detrimental effect on the speed of the machines. You\see that as the machines got faster less code was used. First by making the I/O channels external and then finally with the 2075 being a totally hardwired machine.

Even the size of a Byte of data had to be agreed. We all now understand that an (IBM) Byte is 8 bits + 1 parity, but at the start of this project there were financial pressures to reduce the size of a Byte down to 6 or even 4 bits so reducing the number of circuits used in the computer.

Apart from the compatibility for programs to be transported between systems, the series also had a common set of peripherals. These were connected to each system via channels using what was known at the STANDARD INTERFACE. This allowed users to upgrade peripherals and CPU at different times so helping them to keep their investment in Hardware.

Our collection consists of the following control panels and although not complete I hope offers an insight into what was probably the most important range of Data Processing Machines ever to be manufactured.

2030 2040 2050 2075

This page was last edited on 27/03/00